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LōH5X¿1老E$E1\$l$DAD$LC4,pō@wH5aX1ڿ!AAiH )LVLDH UHUHEH5b1Dҿʀml$L\$u<ތH5wbƒ1葀L@H=`~=u /DeLDDL8H5`¿10uLЉH5`1-@H=_,~= DeLDkDL訋H5_AȿfɃ+f1+uLdAH5_fAfɃ+fA1+5H=Ud}= DeLD裇DLƒ@fE AA+f+f+fEɃAfE҃AfɃ+fHA+APWEB+VH5f]+1W~uH L8ƒ@fE AA+f+f+fEɃAfE҃AfɃ+fHA+APWEB+VH5&]+1}H ifH52R1}L L虉H5SA1E}D݃*DH=KS\{f.H=[D{fH=[4{fH=y[${fH=R{=͘ ~De LDWoDLԈAEĉD$AOHbIDDH5Z1ɿ\|D$E1\$ A DHDPL UA+H5`1|كXZt HA؉SDL$A H5(Z!ƒA1{A]XAD9d$ H5QD1{LK L藇uLA艇u L|D$D+AA3DHDPL TA+H5_1zY^T$H5Pٿ1zH=PxwDeLD<TDL蹆uLA諆AVAȉDDVDA@1VH5XAT0zH H=OTx= DeLD蓂DLuLAu LD$賅uLfD$ 装DfD$&D ED$AAH _A DH5gVE1L%H_E1PyH5 O1=y\$(FLDd$\f.DD!EAA+AH5{NHҿ1 xAHA"Hſ1oH5H1moD mDH5gS1@oDDtbtXH=qHPm&H5\G1nkdH5oH1npH=F mH5H1nCt,LDT$ zH5VC¿1ynL1DHH kCDT$ LDp lu LnzH5F1+nH=EF\$ VlH=jPEl\$ H=E+lH=gPlH=P lH=mPksAH5JBT%1mLLl$H C1LnMH|$H B1]nHL$kdykfDUHATSHdH%(HE1 x!HUdH3%(He[A\]DH`HkHÂHBkH^H RIHHH)1Ld$ILm1L4lHH tXHjx OH=y H*S1$mڅ 1H I H=R,ljH=#R1N@f.ATUSHHHdH%(H$1?HH5RiHI8C ILRLPC PC PP1hH =wuHLiHx8HtQ+HcҾ/HDiHPHHHE@1H$dH3 %(u H[]A\biH=R1$@ATL%/ UHSVH5 $hHH HLjHH ]hHHH5 HiH=ӄ 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[]A\H= HP1ajDf.H= Ht gfDAVAUATUHSHHHdH%(H$1/HtH5OH¿1htJ1L5POL-GOL%nO fLHIDL1hHHuՅu)H$dH3%(u)H[]A\A]A^fDH5 gfUSHHHHdH%(H$1UHtH5NH¿1hH-Nu4H$dH3%(u0H[]DHH1gHHuRffS HFH5 fu$<|t Ht<+u|Hu[f.AUATIUSHHHtRH;HLjtZfDHE+E-LLbHH;uE\E-LLHH[]A\A]9HLH[]A\A]4-B-LH?DAVAUL-uNATUIS-HjH_H{DKDLHH1gH{HcLHH[H{uDKDH NHH1_gHcH{L[H]A\A]A^DH IH9tH{HL[]A\A]A^DKDG H MHH1fHI^Hf.AVAUIATUH }MSHIHHu HLgLdH%(H$1EL$ ED$ fHIfDH;k0tRHHuT LLH$dH3%(H[]A\A]A^f.DC(DK,E9H LHL1eHcLLHEL$ED$HH=b 1cH wLILH1eHI+H /LHL1ceHcLlbAWAVAUATUSH} HH- IdH%(H$1HuHmHHEHDhofAuՃ<w˿8 IHEHAE coHAE$OoHAE(;oAE,M,$MIm0HmIEIEIEHQH } I$D1H| DHHtHH9tH9tx 9z uJ$;H(rދx,9wHN,+x$+N$9HGHHuHt HFHBHVHHuH-| HEDe(] Hu+H@H;uD;`uHmHuL5i~ L-:| MtQDIFM&Mh IGHu qH@Htg;u9huHPML2LpIMuH={ HH"H$dH3%(H[]A\A]A^A_fIGHu%DH@Ht;X u9h(w9h,rIT IWhH@HPHPHPIGF HUD`H@HPHPHPHEHmHH _DAUATHcUSHHH-| HDHX@HtJAAfDC HHt0C HH@HDxuD9| S D9~C HHuH[]A\A]ÐHXuAUATIUSIHHIEIl$LHI]lCE LC E C kLC kC U M PH5GC PDK1DE _XE 8CZt H=H ^C 8C vH= H ^C C H[]A\A]fAWAVAUATAUSH(HH{ @$D$HcH@H{ HHD$dHD$1HHD$fDu *{ 9uAE1D9tAE9~ыz yH=z 1EDr_1HH]fwZEtgD$uHD$HhHIt5LzLrj<t<u H|$L LB\H*_ZDH^DHD$tH5FED1E^HD$HehHIbH=G]\H([]A\A]A^A_H5F1]fAWAVAUATUSHHy P 1HxHEy HHǀHH)H1H=Qy D߃uH=jF[Hx E1HAHAt9tyu1DE1E1ALH-mF;@H[Hu7uD<uH5qF1\H5v h[HHt@K S 1DK DC H\C <uH5 F1t\fAt{Hw IIAL;XL{H5dE1D.\Mt'AO AWH5FEEG 1\Mt;H=OE1ZH[]A\A]A^A_(uH=dDZH=EYH[H=@SHHHt$(HT$0HL$8LD$@LL$Ht7)D$P)L$`)T$p)$)$)$)$)$dH%(HD$1H$H  H HD$H=:u HD$ $D$0HD$1[H=u HHھXH5t Y[SH5ZHt[H=DSHeZHt[H=DUSHHXXHcHHYH[]G\ATUHSHH+EHcHf.H=CHc=HXHHPHHW[]A\H=gCHAA)EEHXE[]A\H5CHH.WE []A\DF$[]A\f.1u({JfD1=2{[]A\D1H=&CH1$H=xBVAD XHtT8tHVH=eB1L%zBVHK HSLLC1dXHHXHHu1YH=CH1H=BHH=SBH1yfAWAVAAUATL%d UH-d SIIL)HH/UHt 1LLDAHH9uH[]A\A]A^A_Ðf.HH "%04x:%02x:%02x.%d [size=%u%s]non-64-bit32-bittype 3low-1M Region %d: [enhanced] [virtual] I/O ports at %04lx [disabled]%08lx (%s, %sprefetchable)Expansion ROM at [disabled by cmd]Slot: Device: Class: %s SVendor: %s SDevice: %s PhySlot: %s Rev: %02x ProgIf: %02x NUMANode: %d -r%02x -p%02x "" "" %s: %s (rev %02x) (prog-if %02x [%s] DeviceName: %s Subsystem: %s slowmediumfast?? (prefetchable) Physical Slot: %s Latency: %d (%dns min%dns max, Cache Line Size: %d bytes NUMA node: %d Flags: bus master, VGA palette snoop, stepping, fast Back2Back, 66MHz, user-definable features, %s devsel, latency %d, IRQ %d, NUMA node %d BIST is running BIST result: %02x I/O window %d: %08x-%08x%s Secondary status: SERR %02x:--versionlspci version 3.5.2-s: %s-d: %sInternal bug: Accessing non-read configuration byte at position %xlspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d !!! Invalid class %04x for header type %02x !!! Unknown header type %02x Control: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c Status: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c SERR%c TAbort%c Reset%c FastB2B%c PriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c Memory window %d: %08x-%08x%s%s BridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c 16-bit legacy interface ports at %04x QRRRRRRRRQRRRQRRRRRRRRRRRRRRRRQRQRRRR`QRPQR@Q(QRQQRPPRPRPKMGTlspci\\\x%02xRead-onlyRead/writebadgoodlargesmallVital Product Data End Product Name: %s fields: [%c%c] %s: %d byte(s) free Not readable No end tag foundExtended capabilityEngineering changesManufacture IDPart numberReservedRead-write areaSerial numberAsset tagVendor specificSystem specificUnknownchecksum %s, %d byte(s) reserved Unknown %s resource type %02x, will not decode more. memory space, non-prefetchableVF memory space, non-prefetchableallocation behind bridge, non-prefetchable memoryallocation behind bridge, prefetchable memoryallocation behind bridge, I/O spacememory space resource unavailable for useI/O space resource unavailable for useentry unavailable for use, PrimaryProperties should be used Command: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c DUL%c Command: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c Link Control 0: CFlE%c CST%c CFE%c PCI-Express to PCI/PCI-X BridgePCI/PCI-X to PCI-Express BridgeRoot Complex Integrated Endpoint DevCap: MaxPayload %d bytes, PhantFunc %d DevCtl: Report errors: Correctable%c Non-Fatal%c Fatal%c Unsupported%c RlxdOrd%c ExtTag%c PhantFunc%c AuxPwr%c NoSnoop%c MaxPayload %d bytes, MaxReadReq %d bytes DevSta: CorrErr%c UncorrErr%c FatalErr%c UnsuppReq%c AuxPwr%c TransPend%c LnkCap: Port #%d, Speed %s, Width x%d, ASPM %s, Exit Latency L0s %s, L1 %s ClockPM%c Surprise%c LLActRep%c BwNot%c ASPMOptComp%c Disabled%c CommClk%c ExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c LnkSta: Speed %s, Width x%d, TrErr%c Train%c SlotClk%c DLActive%c BWMgmt%c ABWMgmt%c SltCap: AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Slot #%d, PowerLimit %.3fW; Interlock%c NoCompl%c SltCtl: Enable: AttnBtn%c PwrFlt%c MRL%c PresDet%c CmdCplt%c HPIrq%c LinkChg%c Control: AttnInd %s, PwrInd %s, Power%c Interlock%c SltSta: Status: AttnBtn%c PowerFlt%c MRL%c CmdCplt%c PresDet%c Interlock%c Changed: MRL%c PresDet%c LinkState%c RootCtl: ErrCorrectable%c ErrNon-Fatal%c ErrFatal%c PMEIntEna%c CRSVisible%c RootSta: PME ReqID %04x, PMEStatus%c PMEPending%c DevCap2: Completion Timeout: %s, TimeoutDis%c, LTR%c, OBFF %s DevCtl2: Completion Timeout: %s, TimeoutDis%c, LTR%c, OBFF %s LnkCtl2: Target Link Speed: %s, EnterCompliance%c SpeedDis%c Transmit Margin: %s, EnterModifiedCompliance%c ComplianceSOS%c Compliance De-emphasis: %s LnkSta2: Current De-emphasis Level: %s, EqualizationComplete%c, EqualizationPhase1%c EqualizationPhase2%c, EqualizationPhase3%c, LinkEqualizationRequest%c MSI-X: Enable%c Count=%d Masked%c Vector table: BAR=%d offset=%08x Enhanced Allocation (EA): NumEntries=%u, secondary=%d, subordinate=%d Entry %u: Enable%c Writable%c EntrySize=%u BAR Equivalent Indicator: I/O spaceVF memory space, prefetchableentry unavailable for use Revision ID: %u.%02u Link Frequency 0: %s Link Frequency 1: %s Bus Number: %02x x%dbridgesimplenot supportedL0sL0s L12.5GT/s8GT/sunknownVia messageVia WAKE#Via message/WAKE#Not SupportedRange ARange BRange ABRange BCRange ABCRange BCDRange ABCDDisabledVia message AVia message B50us to 50ms50us to 100us1ms to 10ms16ms to 55ms65ms to 210ms260ms to 900ms1s to 3.5s4s to 13s17s to 64s-6dB-3.5dBNormal Operating Range Capabilities: [%02x] Power Management version %d Bridge: PM%c B3%c AGP version %x.%x CompactPCI hot-swap PCI-X non-bridge devicePCI-X bridge device Link Frequency: %s HyperTransport: SwitchHyperTransport: DirectRouteHyperTransport: VCSetHyperTransport: Retry ModeHyperTransport: #%02x Hot-plug capableAGP3 Secure device Express (v%d) , MSI %02x Legacy EndpointRoot Port (Slot%c)Upstream PortDownstream Port (Slot%c)Root Complex Event CollectorUnknown type %d, Latency L0s %s, L1 %s ExtTag%c AttnBtn%c AttnInd%c PwrInd%c RBE%c FLReset%c SlotPowerLimit %.3fW BrConfRtry%c LnkCtl: ASPM %s; RCB %d bytes RootCap: CRSVisible%c ARIFwd%c , Selectable De-emphasis: %s PBA: BAR=%d offset=%08x SATA HBA v%d.%d BAR%d Offset=%08x InCfgSpace BAR??%d PCI Advanced Features AFCap: TP%c FLR%c AFCtrl: FLR%c AFStatus: TP%c resource behind functionnot indicatedexpansion ROMVF-BAR %ureserved PrimaryProperties: [%02x] SecondaryProperties: Base: MaxOffset: #%02x [%04x] Address: %08x Data: %04x OnBlinkOffL0s EnabledL0s L1 Enabled<64ns<128ns<256ns<512ns<1us<2us<4usunlimited<8us<16us<32us<64us200MHz300MHz400MHz500MHz600MHz800MHz1.0GHz1.2GHz1.4GHz1.6GHz[a][b][c][d][e]Vend8bit16bit[2]32bit4bit[6]N/Cconv66MHz100MHz133MHz?4?5?6?70P@0x`}xv`v8v vvuhuPut0tsroVendor Specific Information: VirtIO: %s multiplier=%08xLen=%02x BAR=%d offset=%08x size=%08x3264 Capabilities: [%03x v%dAdvanced Error ReportingDownstream Port Containment Source: %04x Virtual Channel??%d%c%s%c Ctrl: ArbSelect=%s Status: InProgress%c VC%d: Arb: Port Arbitration Table Power Budgeting Root Complex Link Link%d: Addr: %08x%08x Root Bridge Control Block ID=%04x Rev=%d Len=%03x Access Control Services IOVSta: Migration%c Initial VFs: %d, Total VFs: %d, Number of VFs: %d, VF offset: %d, stride: %d, Device ID: %04x Supported Page Size: %08x, System Page Size: %08x Region %d: Memory at Page Request Interface (PRI) PRICtl: Enable%c Reset%c Transaction Processing Hints Extended requester support No steering table availableLatency Tolerance Reporting Max snoop latency: %lldns L1 PM Substates L1SubCap: T_CommonMode=%dus LTR1.2_Threshold= LTR1.2_Threshold=%lldns L1SubCtl2:Precision Time Measurement PTMCap: PTMClockGranularity: UnimplementedGreater than 254ns%huns PTMControl: Enabled:%c RootSelected:%c PTMEffectiveGranularity: PortTPowerOnTime=%dus PortTPowerOnTime= T_PwrOn= T_PwrOn=%dusConfigMemMapped UESta: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c UEMsk: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c UESvrt: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c CESta: RxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c CEMsk: RxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c AERCap: First Error Pointer: %02x, GenCap%c CGenEn%c ChkCap%c ChkEn%c DpcCap: INT Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c DpcCtl: Trigger:%x Cmpl%c INT%c ErrCor%c PoisonedTLP%c SwTrigger%c DL_ActiveErr%c DpcSta: Trigger%c Reason:%02x INT%c RPBusy%c TriggerExt:%02x RP PIO ErrPtr:%02x Caps: LPEVC=%d RefClk=%s PATEntryBits=%d Port Arbitration Table [%x] Caps: PATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c Ctrl: Enable%c ID=%d ArbSelect=%s TC/VC=%02x Status: NegoPending%c InProgress%c Device Serial Number %02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x Desc: PortNumber=%02x ComponentID=%02x EltType=%s Addr: %02x:%02x.%d CfgSpace=%08x%08x Root Complex Internal Link Root Complex Event Collector Multi-Function Virtual Channel ACSCap: SrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c DirectTrans%c ACSCtl: SrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c DirectTrans%c Alternative Routing-ID Interpretation (ARI) ARICap: MFVC%c ACS%c, Next Function: %d ARICtl: MFVC%c ACS%c, Function Group: %d Address Translation Service (ATS) ATSCap: Invalidate Queue Depth: %02x ATSCtl: Enable%c, Smallest Translation Unit: %02x Single Root I/O Virtualization (SR-IOV) IOVCap: Migration%c, Interrupt Message Number: %03x IOVCtl: Enable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c Function Dependency Link: %02x %08x (%s-bit, %sprefetchable) VF Migration: offset: %08x, BIR: %x PRISta: RF%c UPRGI%c Stopped%c Page Request Capacity: %08x, Page Request Allocation: %08x Interrupt vector mode supported Device specific mode supported Steering table in TPH capability structure Steering table in MSI-X table Reserved steering table location Max no snoop latency: %lldns Process Address Space ID (PASID) PASIDCap: Exec%c Priv%c, Max PASID Width: %02x PASIDCtl: Enable%c Exec%c Priv%c PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c L1_PM_Substates%c PortCommonModeRestoreTime=%dus L1SubCtl1: PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c Requester:%c Responder:%c Root:%c Desc: TargetPort=%02x TargetComponent=%02x AssocRCRB%c LinkType=%s LinkValid%c 8Р@(РȝPh8(ؔ0ȎConfigEgressInternalFixedWRR32WRR64WRR128TWRR128WRR256??6??7FixedWRR32WRR64WRR128??4??5??6??7100nsuname() failed: %m/lib/modules/%ssysfs.path, Kernel modules: Kernel driver in use: %s %s %sDriver: %s Module: %s lspci: Unable to initialize libkmod context lspci: Unable to load libkmod resources: error %d %s/devices/%04x:%02x:%02x.%d/drivershow_driver: sysfs device name too long, why?lspci: libkmod lookup failed: error %d +-[%04x:%02x]-\-[%04x:%02x]-%02x.%x-[%02x]--[%02x-%02x]- %s## %02x:%02x.%d is a bridge from %02x to %02x-%02x !!! Bridge points to invalid primary bus.!!! Bridge points to invalid bus range.Discovered device %02x:%02x.%d WARNING: Bus mapping can be reliable only with direct hardware access enabled. Mapping bus %02x But it was filtered out. Summary of buses: %02x: Entered via %02x:%02x.%d Primary host busSecondary host bus (?) %02x.%d Bridge to %02x-%02x dump.namehelpKnown PCI access methods: Known PCI access parameters: %-20s %s (%s) Unable to allocate %d bytes of memoryUnknown hardware configuration type %sNo such PCI access method: %s (see `-A help' for a list)Invalid PCI access parameter syntax: %sUnrecognized PCI access parameter: %s (see `-O help' for a list)@Ȼ;3,<l,LLLt\| L t EDC  ABA ,x>BHA f ABD ,,>IBAD ~ABL\>BBE B(H0A8Gc 8A0A(B BBBA 8CTC BBB B(D0A8P`j 8A0A(B BBBG ohHpehO`hhHpHxF`BRXD`MhRpwxG]`hHpHxF[BQPN`MhRpwxGj`)hDpExBAIFET`hhWpnhJ`hDpExBAIFET`EhBpExBBBBBBAFL^` 8K0A(B BBBT \hLBBE B(D0A8R@Q 8A0A(B BBBC _8A0A(B BBB|L/BBB B(A0A8Qz 8A0A(B BBBA AxB'VRdjGHFdBGA`RRwFc$DEBAIFEUsURXILHBAABBBBAAIdHDA^IEFAAaClBQUWVSbSc|HFDDE^QXWWYVFRG{BARAoXFA)XKA}BEESG_WV^EDHYEDHZZuICAEDH[IBAPxCsB|D yBBD B(D0A8V@] 8M0A(B BBBH  8F0A(B BBBE D 8A0A(B BBBA  z* BBG B(D0A8Z! 8A0A(B BBBD !!A!O!B!!Q!v!X!B!w!F!W!A!!C!r!B!:!F!D!E!]!|!F!D!E!Z!|!G!l!A!U!F!o!A!!G!g!A!!U![!I!I!!E!B!E!B!G!D!A!x!!E!B!E!B!G!D!A!x!!E!B!E!B!G!D!A!x!q!Z!n!A!I!Z!!B!P !G!W J !G!_ $| 8BAC Jt F L `BAA JhEEGKr  AABA < 0QBHD  ABI _ ABA 4 PDL XBBB A(D0G 0A(A BBBG , AAJd AAF  `FADL BBD A(D0O (A ABBE D (G ABBE L4НBBI A(D0 (D BBBJ Z (A BBBE DBBE A(H0`{ 0A(A BBBK L؟BBB B(A0A8ND 8A0A(B BBBJ <BBD A(H0g (A ABBB D\BBD A(L0b8Q@R8H0n(A ABBLBBB B(D0A8D` 8A0A(B BBBA LLBBB B(A0A8D@ 8A0A(B BBBA DAJdЧ AP A Ч AP A $Ч-AAG aAAtا'NAD j ABH A ABD _ ABF J ABK OABI DDeBBE B(H0H8M@r8A0A(B BBB##CPEC*MN>PNMRVYRWbSNrYAVY+.4 8HDSY`gnsx}nsx} $*18;>Az  (+!0+!o`   0!8 oo ooh oF-!&6FVfv&6FVfv&6FVfv&6FVfv2!Usage: lspci [] Basic display modes: -mm Produce machine-readable output (single -m for an obsolete format) -t Show bus tree Display options: -v Be verbose (-vv for very verbose) -k Show kernel drivers handling each device -x Show hex-dump of the standard part of the config space -xxx Show hex-dump of the whole config space (dangerous; root only) -xxxx Show hex-dump of the 4096-byte extended config space (root only) -b Bus-centric view (addresses and IRQ's as seen by the bus) -D Always show domain numbers Resolving of device ID's to names: -n Show numeric ID's -nn Show both textual and numeric ID's (names & numbers) -q Query the PCI ID database for unknown ID's via DNS -qq As above, but re-query locally cached entries -Q Query the PCI ID database for all ID's via DNS Selection of devices: -s [[[[]:]]:][][.[]] Show only devices in selected slots -d []:[][:] Show only devices with specified ID's Other options: -i Use specified ID database instead of %s -p Look up kernel modules in a given file instead of default modules.pcimap -M Enable `bus mapping' mode (dangerous; root only) PCI access options: -A Use the specified PCI access method (see `-A help' for a list) -O = Set PCI access parameter (see `-O help' for a list) -G Enable PCI access debugging -H Use direct hardware access ( = 1 or 2) -F Read PCI configuration dump from a given file nvbxs:d:ti:mgp:qkMDQA:GO:H:F:5b3aa16b9a69bba7c3b9c7e028ed25ce4bccb9.debugRm.shstrtab.interp.note.ABI-tag.note.gnu.build-id.gnu.hash.dynsym.dynstr.gnu.version.gnu.version_r.rela.dyn.rela.plt.init.plt.got.text.fini.rodata.eh_frame_hdr.eh_frame.init_array.fini_array.jcr.data.rel.ro.dynamic.got.plt.data.bss.gnu_debuglink 88TT !tt$4o4> F` ` Noh h [o jtB88~y" B   X X (+!(+0+!0+8+!8+@+!@+ -!-/!/00!02!2x 8!x8 x848